View 1EDI05I12AF_7268856.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

industrial power control preliminary data sheet rev. 1.00, 2013-11-20 separate output variant for igbt single channel igbt gate driver ic 1EDI05I12AF 1edi20i12af 1edi40i12af 1edi60i12af 1edi eicedriver? compact
edition 2013-11-20 published by infineon technologies ag 81726 munich, germany ? 2013 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
1edi eicedriver? compact separate output variant for igbt preliminary data sheet 3 rev. 1.00, 2013-11-20 trademarks of infineon technologies ag aurix?, bluemoon?, c166?, ca npak?, cipos?, cipurse?, comn eon?, econopack?, coolmos?, coolset?, corecontrol?, crossave?, dave?, easypim?, econobri dge?, econodual?, econopim?, eicedriver?, eupec?, fcos?, hitfe t?, hybridpack?, i2rf?, isoface?, isopack?, mipaq?, modstack?, my-d?, novalithic?, omnitune?, optimos?, origa?, primarion?, primepack?, primestack?, pr o-sil?, profet?, rasic?, re versave?, satric?, sieget?, sindrion?, sipmos?, smarti?, smartlew is?, solid flash?, tempfet?, thinq!?, trenchstop?, tricore?, x-go ld?, x-pmu?, xmm?, xposys?. other trademarks advance design system? (ads) of agilent te chnologies, amba?, arm?, multi-ice?, keil?, primecell?, realview?, thumb?, vision? of arm limited, uk. autosar? is licensed by autosar development partnership. bluetooth? of bluetooth sig inc. cat-iq? of dect forum. colossus?, firstgps? of trimble navigation ltd. emv? of emvc o, llc (visa holdings in c.). epcos? of epcos ag. flexgo? of microsoft corp oration. flexray? is licensed by flexray consortium. hyperterminal? of hilgraeve incorporated. iec? of commission electrot echnique internationale. irda? of infrared data association corporation. iso? of international organization for standardization. matlab? of mathworks, inc. maxim? of maxim integrated products, inc. microtec?, nucleus? of mentor graphics corporation. mifare? of nx p. mipi? of mipi alliance, inc. mips? of mips technologies, inc., usa. murata? of murata manufacturing co., microwave offi ce? (mwo) of applied wave research inc., omnivision? of omnivision technologies, inc. open wave? openwave systems inc. red hat? red hat, inc. rfmd? rf micro devices, inc. sirius? of sirius sate llite radio inc. solaris? of sun microsystems, inc. spansion? of spansion llc ltd. symbian? of sy mbian software limited. taiyo yuden? of taiyo yuden co. teaklite? of ceva, inc. t ektronix? of tektroni x inc. toko? of toko kabushiki kaisha ta. unix? of x/open company limited. verilog?, palladium? of cadence design systems, inc. vlynq? of texas instruments inco rporated. vxworks?, wind river? of wind river systems, inc. zetex? of diodes zetex limited. last trademarks update 2010-10-26 revision history page or item subjects (major changes since previous revision) rev. 1.00, 2013-11-20 all pages editorial changes rev. 0.56, 2012-11-14 all pages editorial changes
1edi eicedriver? compact separate output variant for igbt preliminary data sheet 4 rev. 1.00, 2013-11-20 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 list of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 list of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 pin configuration and functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 pin functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2 supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.3 protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3.1 undervoltage lockout (uvlo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3.2 active shut-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3.3 short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.4 non-inverting and inverting inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.5 driver outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.2 operating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3.1 voltage supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3.2 logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3.3 gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3.4 short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.3.5 dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.3.6 active shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 timing diagramms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.1 reference layout for thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.2 printed circuit board guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table of contents
1edi eicedriver? compact separate output variant for igbt preliminary data sheet 5 rev. 1.00, 2013-11-20 figure 1 typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 2 block diagram 1EDI05I12AF, 1edi20i12af, 1edi40i 12af and 1edi60i12af . . . . . . . . . . . . . . . 9 figure 3 pg-dso-8-51 (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4 application example bipolar supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5 application example unipolar supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 6 propagation delay, rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 7 typical switching behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 8 uvlo behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 9 pg-dso-8-51 (plastic (green) dual small outline package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 10 reference layout for thermal data (jedec 1s0p, 100mm2, copper thickness 35 m) . . . . . . . . 21 list of figures
1edi eicedriver? compact separate output variant for igbt preliminary data sheet 6 rev. 1.00, 2013-11-20 table 1 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 2 absolute maximum ra tings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 3 operating parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 4 voltage supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 5 logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 6 gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 7 short circuit clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 8 dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 9 active shut down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 list of tables
ed- compact 1edi eicedri ver? compact single channel igbt gate driver ic separate output variant for igbt preliminary data sheet 7 rev. 1.00, 2013-11-20 1overview main features ? single channel isolated igbt driver ? input to output isolation voltage up to 1200 v ? for high voltage power igbts ? up to 6 a minimum peak rail-to-rail output ? separate source and sink outputs product highlights ? galvanically isolated coreless transformer driver ? wide input voltage operating range ? suitable for operation at high ambient temperature typical application ? ac and brushless dc motor drives ? high voltage dc/dc-conv erter and dc/ac-inverter ? induction heating re sonant application ? ups-systems ? welding ?solar description the 1EDI05I12AF, 1edi20i12af, 1edi40i 12af, and 1edi60i12af are galvanica lly isolated single channel igbt driver in a pg-dso-8-51 package t hat provide output currents up to 6 a at separated output pins. the input logic pins operate on a wide input voltage range from 3 v to 15 v using cmos threshold levels to support even 3.3 v microcontroller. data transfer across the isolat ion barrier is realized by the coreless transformer technology. every driver family member comes with logic input and driver output under voltage lockout (uvlo) and active shutdown. product name gate drive current package 1EDI05I12AF 0.5 a pg-dso-8-51 1edi20i12af 2.0 a pg-dso-8-51 1edi40i12af 4.0 a pg-dso-8-51 1edi60i12af 6.0 a pg-dso-8-51
1edi eicedriver? compact separate output variant for igbt overview preliminary data sheet 8 rev. 1.00, 2013-11-20 figure 1 typical application out+ out+ control eicedriver tm 1edixxi12af eicedriver tm 1edixxi12af in+ in+ in- in- gnd1 vcc1 vcc2,h vcc2,l gnd2,l gnd2,h gnd1 vcc1 out- out-
1edi eicedriver? compact separate output variant for igbt block diagram preliminary data sheet 9 rev. 1.00, 2013-11-20 2 block diagram figure 2 block diagram 1EDI05I12AF, 1edi 20i12af, 1edi40i12af and 1edi60i12af in+ in- gnd1 vcc1 2 3 4 1 6 7 5 8 vcc2 out- out+ gnd2 input filter tx uvlo & active filter input filter gnd1 vcc1 uvlo rx & shoot through pr otection vcc2
1edi eicedriver? compact separate output variant for igbt pin configuration and functionality preliminary data sheet 10 rev. 1.00, 2013-11-20 3 pin configuration and functionality 3.1 pin configuration figure 3 pg-dso-8-51 (top view) 3.2 pin functionality vcc1 logic input supply voltage of 3.3 v up to 15 v wide operating range. in+ non inverting driver input in+ non-inverted control signal for driver output if in- is set to low. (output sourcing active at in+ = high and in- = low) due to internal filtering a minimum pulse width is defined to ensure robustness against noise at in+. an internal weak pull-down-resistor favors off-state. table 1 pin configuration pin no. name function 1 vcc1 positive logic supply 2 in+ non-inverted driver input (active high) 3 in- inverted driver input (active low) 4 gnd1 logic ground 5 vcc2 positive power supply output side 6 out+ driver source output 7 out- driver sink output 8 gnd2 power ground 1 2 3 4 8 7 6 5 vcc1 in+ in- gnd1 gnd2 out- out+ vcc2
1edi eicedriver? compact separate output variant for igbt pin configuration and functionality preliminary data sheet 11 rev. 1.00, 2013-11-20 in- inverting driver input in- inverted control signal for driver output if in+ is se t to high. (output sourcing ac tive at in- = low and in+ = high) due to internal filtering a mi nimum pulse width is defined to ensure robu stness against noise at in-. an internal weak pull-up-resistor favors off-state. gnd1 ground connection of input circuit. vcc2 positive power supply pin of output driving circuit. a proper blocking capacitor has to be placed close to this supply pin. out+ driver source output driver source output pin to turn on external igbt. during on-state the driving output is switched to vcc2. switching of this output is contro lled by in+ and in-. this output will also be turned off at an uvlo event. during turn off the ou t+ terminal is able to sink approx. 100 ma. out- driver sink output driver sink output pin to turn off external igbt. during off-state the driving output is switched to gnd2. switching of this output is controlled by in+ and in-. in case of uvlo an active shut down keeps the output voltage at a low level. gnd2 reference ground reference ground of the output driving circuit. in case of a bipolar supply (positive an d negative voltage referred to igbt em itter) this pin is connected to the negative supply voltage.
1edi eicedriver? compact separate output variant for igbt functional description preliminary data sheet 12 rev. 1.00, 2013-11-20 4 functional description 4.1 introduction the 1edi eicedriver? compact is a general purpose igbt gate driver. basic cont rol and protection features support fast and easy design of highly reliable systems. the integrated galvanic isolation between control input logi c and driving output stage grants additional safety. its wide input voltage supply range support the direct connection of various signal sources like dsps and microcontrollers. the separated rail-to-rail driver outputs simplify gate resistor selection, save an external high current bypass diode and enhance dv/dt control. figure 4 application ex ample bipolar supply 4.2 supply the driver can operate over a wide supply voltage range, either unipolar or bipolar. with bipolar supply the driver is typi cally operated with a positive voltage of 15 v at vcc2 and a negative voltage of -8v at gnd2 relative to the emitter of the igbt as seen in figure 4 . negative supply can help to prevent a dynamic turn on due to the additional charge wh ich is generated from igbt?s input capacitance. for unipolar supply configuration the driver is typically supplied with a posi tive voltage of 15 v at vcc2. in this case, careful evaluation for turn off gate resistor sele ction is recommended to avoid dynamic turn on (see figure 5 ). figure 5 application exam ple unipolar supply gnd1 in+ in- vcc1 out+ vcc2 gnd2 out- +5v sgnd in +15v 10r 1 100 n 3r3 -8v 1 gnd1 in+ in- vcc1 out+ vcc2 gnd2 out- +5v sgnd in +15v 10 r 1 100 n 3r3
1edi eicedriver? compact separate output variant for igbt functional description preliminary data sheet 13 rev. 1.00, 2013-11-20 4.3 protection features 4.3.1 undervoltage lockout (uvlo) to ensure correct switching of igbts the device is e quipped with an undervoltage lockout for input and output independently. operation starts only after both vcc levels have increased beyond the respective v uvloh levels (see also figure 8 ). if the power supply voltage v vcc1 of the input chip drops below v uvlol1 a turn-off signal is sent to the output chip before power-down. the igbt is switched off an d the signals at in+ and in- are ignored until v vcc1 reaches the power-up voltage v uvloh1 again. if the power supply voltage v vcc2 of the output chip goes down below v uvlol2 the igbt is switched off and signals from the input chip are ignored until v vcc2 reaches the power-up voltage v uvloh2 again. note: v vcc2 is always referred to gnd2 and does not differentiate between unipolar or bipolar supply. 4.3.2 active shut-down the active shut-down feature en sures a safe igbt off-state in case the ou tput chip is not connected to the power supply or an under voltage lockout is in effect . the igbt gate is clam ped at out- to gnd2. 4.3.3 short circuit clamping during short circuit the igbt ?s gate voltage tend s to rise because of the feedb ack via the miller capacitance. an additional protection circuit connected to out+ limits this vo ltage to a value slightly high er than the supply voltage. a maximum current of 500 ma may be fed back to the supply through this path for 10 s. if higher currents are expected or tighter clamping is desired external schottky diodes may be added. 4.4 non-inverting and inverting inputs there are two possible input modes to control the igbt. at non-inverting mode in+ contro ls the driver output while in- is set to low. at inverting mo de in- controls the driver output wh ile in+ is set to high, please see figure 7 . a minimum input pulse width is defined to filter occasional glitches. 4.5 driver outputs the output driver section uses mosfets to provide a rail-to -rail output. this feature permits that tight control of gate voltage during on-state and short circuit can be mainta ined as long as the driver ?s supply is stable. due to the low internal voltage drop , switching behaviour of the igbt is pre dominantly governed by the gate resistor. furthermore, it reduces the power to be dissipated by the driver.
1edi eicedriver? compact separate output variant for igbt electrical parameters preliminary data sheet 14 rev. 1.00, 2013-11-20 5 electrical parameters 5.1 absolute maximum ratings note: absolute maximum ratings are defi ned as ratings, which when being exceeded may lead to destruction of the integrated circuit. unless otherwise noted all parameters refer to gnd1. table 2 absolute maximum ratings parameter symbol values unit note / test condition min. max. power supply output side v vcc2 -0.3 40 v 1) 1) with respect to gnd2. gate driver output v out v gnd2 -0.3 v vcc2 +0.3 v ? positive power supply input side v vcc1 -0.3 18.0 v ? logic input voltages (in+,in-) v logicin -0.3 18.0 v ? input to output isol ation voltage (gnd2) v iso -1200 1200 v junction temperature t j -40 150 c ? storage temperature t s -55 150 c ? power dissipation (input side) p d, in ?25mw 2) @ t a = 25c 2) see figure 10 for reference layouts for these the rmal data. thermal performance may c hange significantly with layout and heat dissipation of components in close proximity. power dissipation (output side) p d, out ? 400 mw 2) @ t a = 25c thermal resistance (input side) r thja,in ? 145 k/w 2) @ t a = 85c thermal resistance (output side) r thja,out ? 165 k/w 2) @ t a = 85c esd capability v esd,hbm ? 2 kv human body model 3) 3) according to eia/jesd22-a114-c (dischar ging a 100 pf capacitor through a 1.5 k ? series resistor).
1edi eicedriver? compact separate output variant for igbt electrical parameters preliminary data sheet 15 rev. 1.00, 2013-11-20 5.2 operating parameters note: within the operating range the ic operates as de scribed in the functional description. unless otherwise noted all parameters refer to gnd1. 5.3 electrical characteristics note: the electrical characteri stics include the spread of values in supply voltages, load and junction temperatures given below. typical values represent the median values at t a = 25c. unless otherwise noted all voltages are given with respect to their re spective gnd (gnd1 for pins 1 to 3, gnd2 for pins 5 to 7). 5.3.1 voltage supply table 3 operating parameters parameter symbol values unit note / test condition min. max. power supply output side v vcc2 13 35 v 1) 1) with respect to gnd2. power supply input side v vcc1 3.1 17 v ? logic input voltages (in+,in-) v logicin -0.3 17 v ? switching frequency f sw ?1.0mhz 2) 3) 2) do not exceed max. power dissipation 3) parameter is not subject to production test - verified by design/characterization ambient temperature t a -40 125 c ? thermal coefficient, junction-top th,jt ?4.8k/w 3) @ t a = 85c common mode transient immunity (cmti) |d v iso /dt| ? 100 kv/ s 3) @ 1000 v table 4 voltage supply parameter symbol values unit note / test condition min. typ. max. uvlo threshold input chip v uvloh1 ?2.853.1v? v uvlol1 2.55 2.75 ? v ? uvlo hysteresis input chip ( v uvloh1 - v uvlol1 ) v hys1 tbd 0.1 ? v ? uvlo threshold output chip (igbt supply) v uvloh2 ?12.012.7v? v uvlol2 10.5 11.1 ? v ? uvlo hysteresis output chip ( v uvloh2 - v uvlol2 ) v hys2 0.7 0.85 ? v ?
1edi eicedriver? compact separate output variant for igbt electrical parameters preliminary data sheet 16 rev. 1.00, 2013-11-20 5.3.2 logic input note: unless stated otherwise vcc1 = 5.0v 5.3.3 gate driver quiescent current input chip i q1 ?0.651.0ma v vcc1 = 5 v in+ = high, in- = low =>out = high quiescent current output chip i q2 ?1.22.0ma v vcc2 = 15 v in+ = high, in- = low =>out = high table 5 logic input parameter symbol values unit note / test condition min. typ. max. in+,in- low input voltage v in+l , v in-l ??1.5v? in+,in- high input voltage v in+h , v in-h 3.5??v? in+,in- low input voltage v in+l , v in-l ? ? 30 % of vcc1 in+,in- high input voltage v in+h , v in-h 70??%of vcc1 in- input current i in- ?70200 a v in- = gnd1 in+ input current i in+ ,?70200 a v in+ = vcc1 table 6 gate driver parameter symbol values unit note / test condition min. typ. max. high level output peak current 1EDI05I12AF 1edi20i12af 1edi40i12af 1edi60i12af i out+,peak -0.5 -2.0 -4.0 -6.0 ??a 1) in+ = high, in- = low, v vcc2 = 15 v 1)specified min. output current is forced; voltage across the device v (vcc2 - out+) or v (out- - gnd2) < v vcc2 . low level output peak current 1EDI05I12AF 1edi20i12af 1edi40i12af 1edi60i12af i out-,peak 0.5 2.0 4.0 6.0 ??a 1) in+ = low, in- = low, v vcc2 = 15 v table 4 voltage supply (cont?d) parameter symbol values unit note / test condition min. typ. max.
1edi eicedriver? compact separate output variant for igbt electrical parameters preliminary data sheet 17 rev. 1.00, 2013-11-20 5.3.4 short circuit clamping 5.3.5 dynamic characteristics dynamic characteristics are measured with v vcc1 = 5 v and v vcc2 = 15 v. table 7 short circuit clamping parameter symbol values unit note / test condition min. typ. max. clamping voltage (out+) ( v out - v vcc2 ) v clpout ? 0.9 1.3 v in+ = high, in- = low, out = high i out = 500 ma pulse test, t clpmax = 10 s) table 8 dynamic characteristics parameter symbol values unit note / test condition min. typ. max. input in to output propa- gation delay on t pdon 270 300 330 ns c load = 100 pf v in+ = 50%, v out =50% @ 25c input in to output propa- gation delay off t pdoff 270 300 330 ns input in to output propa- gation delay distortion ( t pdoff - t pdon ) t pdisto -30 5 40 ns input pulse suppression in+, in- t minin+ , t minin- 230 240 ? ns ? input in to output propagation delay on variation due to temp t pdont ? ? tbd ns 1) c load = 100 pf v in+ = 50%, v out =50% 1) the parameter is not subject to production test - verified by design/characterization input in to output propagation delay off variation due to temp t pdont ? ? tbd ns 1) c load = 100 pf v in+ = 50%, v out =50% input in to output propagation delay distortion variation due to temp ( t pdoff - t pdon ) t pdistot ? ? tbd ns 1) c load = 100 pf v in+ = 50%, v out =50% rise time t rise 10 18 30 ns c load = 1 nf v l 20%, v h 80% fall time t fall 10 20 30 ns c load = 1 nf v l 20%, v h 80%
1edi eicedriver? compact separate output variant for igbt electrical parameters preliminary data sheet 18 rev. 1.00, 2013-11-20 5.3.6 active shut down table 9 active shut down parameter symbol values unit note / test condition min. typ. max. active shut down voltage v actsd 1) 1) with reference to gnd2 ?2.22.5v i out- / i out-,peak =0.1, v cc2 open
1edi eicedriver? compact separate output variant for igbt timing diagramms preliminary data sheet 19 rev. 1.00, 2013-11-20 6timing diagramms figure 6 propagation delay, rise and fall time figure 7 typical switching behavior figure 8 uvlo behavior in+ out t pdon 50 % 50 % t pdoff 20 % 80 % t rise t fall out in+ in \ out in+ vcc2 vcc1 v uvloh 2 v uvlol 2 v uvloh 1 v uvlol 1
1edi eicedriver? compact separate output variant for igbt package outlines preliminary data sheet 20 rev. 1.00, 2013-11-20 7 package outlines figure 9 pg-dso-8-51 (plastic (green) dual small outline package)
1edi eicedriver? compact separate output variant for igbt application notes preliminary data sheet 21 rev. 1.00, 2013-11-20 8 application notes 8.1 reference layout for thermal data the pcb layout shown in figure 10 represents the reference layout used for the thermal characterisation. pin 4 (gnd1) and pin 8 (gnd2) require each a ground plane of 100 mm2 for achieving maximum power dissipation. the separate output variant for igbt is conceived to dissi pate most of the heat ge nerated through these pins. the thermal coefficient junction-top ( th,jt ) can be used to calculate the juncti on temperature at a given top case temperature and driver power dissipation: figure 10 reference layout for thermal data (jedec 1s0p, 100mm2, copper thickness 35 m) 8.2 printed circuit board guidelines the following factors should be taken in to account for an optimum pcb layout. ? sufficient spacing should be kept between high vo ltage isolated side and low voltage side circuits. ? the same minimum distance between two adjacent high-side isolated parts of the pcb should be maintained to increase the effective isolation and to reduce parasitic coupling. ? in order to ensure low supply ripple and clean switching signals, bypass c apacitor trace lengths should be kept as short as possible. t j th jt , p d t top + ? =
published by infineon technologies ag www.infineon.com

▲Up To Search▲

Price & Availability of 1EDI05I12AF

	To Download 1EDI05I12AF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .